Wishbone Bus: Difference between revisions
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an open source hardware computer bus intended to let the parts of an integrated circuit communicate with each other [[Category: | The '''Wishbone Bus''' is an open source hardware computer bus intended to let the parts of an integrated circuit communicate with each other. The aim is to allow the connection of differing cores to each other inside of a chip. The '''Wishbone Bus''' is used by many designs in the OpenCores project. | ||
For more information, see [[wikipedia:Wishbone (computer bus)|Wikipedia]]. | |||
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Latest revision as of 15:45, 23 March 2026
The Wishbone Bus is an open source hardware computer bus intended to let the parts of an integrated circuit communicate with each other. The aim is to allow the connection of differing cores to each other inside of a chip. The Wishbone Bus is used by many designs in the OpenCores project.
For more information, see Wikipedia.